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Course Outline
Course Introduction
- Definition and capabilities of the ROCm platform
- Overview of the HIP programming interface
- Comparative analysis of ROCm, CUDA, and OpenCL
- Architectural review of ROCm and HIP features
- Configuration of the development environment
Initialization and Setup
- Establishing a new ROCm project within Visual Studio Code
- Review of project architecture and file components
- Compilation and execution of the initial program
- Output management using printf and fprintf directives
ROCm Application Programming Interface
- Integration of the ROCm API within host-side applications
- Methods for querying device specifications and capabilities via the ROCm API
- Memory allocation and deallocation procedures using the ROCm API
- Data transfer mechanisms between host and device using the ROCm API
- Kernel initiation and thread synchronization via the ROCm API
- Error handling and exception management within the ROCm API
HIP Language Implementation
- Role of the HIP language in device-side program logic
- Development of GPU-executable kernels for data manipulation using HIP
- Utilization of HIP data types, qualifiers, operators, and expressions
- Application of HIP built-in functions, variables, and libraries for standard operations
ROCm and HIP Memory Architecture
- Differentiation between host and device memory structures
- Application of ROCm and HIP memory spaces: global, shared, constant, and local
- Management of ROCm and HIP memory objects including pointers, arrays, textures, and surfaces
- Implementation of memory access modes such as read-only, write-only, and read-write
- Adherence to ROCm and HIP memory consistency models and synchronization protocols
ROCm and HIP Execution Framework
- Distinction between host and device execution paradigms
- Definition of parallelism using ROCm and HIP threads, blocks, and grids
- Application of ROCm and HIP thread functions (e.g., hipThreadIdx_x, hipBlockIdx_x, hipBlockDim_x)
- Use of ROCm and HIP block functions (e.g., __syncthreads, __threadfence_block)
- Implementation of ROCm and HIP grid functions (e.g., hipGridDim_x, hipGridSync, cooperative groups)
Diagnostic Procedures
- Identification of common errors and defects in ROCm and HIP applications
- Inspection of variables, breakpoints, and call stacks using the Visual Studio Code debugger
- Debugging of ROCm and HIP programs on AMD hardware using the ROCm Debugger
- Performance analysis of ROCm and HIP programs on AMD hardware using the ROCm Profiler
Performance Optimization
- Analysis of factors influencing ROCm and HIP program performance
- Application of ROCm and HIP coalescing strategies to enhance memory throughput
- Use of ROCm and HIP caching and prefetching methods to minimize memory latency
- Optimization of memory access and bandwidth using ROCm and HIP shared and local memory techniques
- Measurement and improvement of execution time and resource utilization through ROCm and HIP profiling tools
Summary and Future Applications
Requirements
- Familiarity with C/C++ language standards and parallel programming principles
- Foundational knowledge of computer architecture and memory hierarchy
- Practical experience with command-line interfaces and code editors
Target Audience
- Developers seeking to master the use of ROCm and HIP for programming AMD GPUs to exploit parallelism for government and agency systems
- Developers aiming to write high-performance, scalable code compatible with various AMD devices
- Programmers interested in exploring low-level GPU programming aspects to optimize code performance for institutional and public sector requirements
28 Hours
